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/*
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* vim:ts=4:sw=4:expandtab
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*
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* © 2016 Sebastian Frysztak
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*
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* See LICENSE for licensing information
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*
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*/
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#include "blur.h"
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#include <math.h>
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#include <xmmintrin.h>
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#include <immintrin.h>
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#define ALIGN16 __attribute__((aligned(16)))
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#define KERNEL_SIZE 7
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#define HALF_KERNEL KERNEL_SIZE / 2
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// number of xmm registers needed to store
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// input pixels for given kernel size
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#define REGISTERS_CNT (KERNEL_SIZE + 4/2) / 4
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// AVX intrinsics missing in GCC
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#define _mm256_set_m128i(v0, v1) _mm256_insertf128_si256(_mm256_castsi128_si256(v1), (v0), 1)
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#define _mm256_setr_m128i(v0, v1) _mm256_set_m128i((v1), (v0))
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#define _mm256_set_m128(v0, v1) _mm256_insertf128_ps(_mm256_castps128_ps256(v1), (v0), 1)
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#define _mm256_setr_m128(v0, v1) _mm256_set_m128((v1), (v0))
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void blur_impl_sse2(uint32_t *src, uint32_t *dst, int width, int height, float sigma) {
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// prepare kernel
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float kernel[KERNEL_SIZE];
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float coeff = 1.0 / sqrtf(2 * M_PI * sigma * sigma), sum = 0;
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for (int i = 0; i < KERNEL_SIZE; i++) {
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float x = HALF_KERNEL - i;
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kernel[i] = coeff * expf(-x * x / (2.0 * sigma * sigma));
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sum += kernel[i];
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}
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// normalize kernel
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for (int i = 0; i < KERNEL_SIZE; i++)
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kernel[i] /= sum;
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// horizontal pass includes image transposition:
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// instead of writing pixel src[x] to dst[x],
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// we write it to transposed location.
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// (to be exact: dst[height * current_column + current_row])
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blur_impl_horizontal_pass_sse2(src, dst, kernel, width, height);
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blur_impl_horizontal_pass_sse2(dst, src, kernel, height, width);
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}
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void blur_impl_horizontal_pass_sse2(uint32_t *src, uint32_t *dst, float *kernel, int width, int height) {
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for (int row = 0; row < height; row++) {
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for (int column = 0; column < width; column++, src++) {
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__m128i rgbaIn[REGISTERS_CNT];
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// handle borders
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int leftBorder = column < HALF_KERNEL;
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int rightBorder = column > width - HALF_KERNEL;
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uint32_t _rgbaIn[KERNEL_SIZE] ALIGN16;
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int i = 0;
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if (leftBorder) {
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// for kernel size 7x7 and column == 0, we have:
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// x x x P0 P1 P2 P3
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// first loop mirrors P{0..3} to fill x's,
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// second one loads P{0..3}
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for (; i < HALF_KERNEL - column; i++)
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_rgbaIn[i] = *(src + (HALF_KERNEL - i));
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for (; i < KERNEL_SIZE; i++)
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_rgbaIn[i] = *(src - (HALF_KERNEL - i));
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for (int k = 0; k < REGISTERS_CNT; k++)
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rgbaIn[k] = _mm_load_si128((__m128i*)(_rgbaIn + 4*k));
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} else if (rightBorder) {
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for (; i < width - column; i++)
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_rgbaIn[i] = *(src + i);
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for (int k = 0; i < KERNEL_SIZE; i++, k++)
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_rgbaIn[i] = *(src - k);
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for (int k = 0; k < REGISTERS_CNT; k++)
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rgbaIn[k] = _mm_load_si128((__m128i*)(_rgbaIn + 4*k));
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} else {
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for (int k = 0; k < REGISTERS_CNT; k++)
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rgbaIn[k] = _mm_loadu_si128((__m128i*)(src + 4*k - HALF_KERNEL));
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}
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__m128i zero = _mm_setzero_si128();
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__m128i acc = _mm_setzero_si128();
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acc = _mm_add_epi16(acc, _mm_unpacklo_epi8(rgbaIn[0], zero));
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acc = _mm_add_epi16(acc, _mm_unpackhi_epi8(rgbaIn[0], zero));
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acc = _mm_add_epi16(acc, _mm_unpacklo_epi8(rgbaIn[1], zero));
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// kernel size equals to 7, but we can only load multiples of 4 pixels
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// we have to set 8th pixel to zero
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acc = _mm_add_epi16(acc, _mm_andnot_si128(_mm_set_epi32(0xFFFFFFFF, 0xFFFFFFFF, 0, 0),
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_mm_unpackhi_epi8(rgbaIn[1], zero)));
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acc = _mm_add_epi32(_mm_unpacklo_epi16(acc, zero),
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_mm_unpackhi_epi16(acc, zero));
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acc = _mm_cvtps_epi32(_mm_mul_ps(_mm_cvtepi32_ps(acc),
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_mm_set1_ps(1/((float)KERNEL_SIZE))));
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*(dst + height * column + row) =
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_mm_cvtsi128_si32(_mm_packus_epi16(_mm_packs_epi32(acc, zero), zero));
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}
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}
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}
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void blur_impl_avx(uint32_t *src, uint32_t *dst, int width, int height, float sigma) {
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// prepare kernel
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float kernel[KERNEL_SIZE];
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float coeff = 1.0 / sqrtf(2 * M_PI * sigma * sigma), sum = 0;
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for (int i = 0; i < KERNEL_SIZE; i++) {
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float x = HALF_KERNEL - i;
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kernel[i] = coeff * expf(-x * x / (2.0 * sigma * sigma));
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sum += kernel[i];
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}
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// normalize kernel
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for (int i = 0; i < KERNEL_SIZE; i++)
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kernel[i] /= sum;
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// horizontal pass includes image transposition:
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// instead of writing pixel src[x] to dst[x],
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// we write it to transposed location.
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// (to be exact: dst[height * current_column + current_row])
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blur_impl_horizontal_pass_avx(src, dst, kernel, width, height);
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blur_impl_horizontal_pass_avx(dst, src, kernel, height, width);
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}
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void blur_impl_horizontal_pass_avx(uint32_t *src, uint32_t *dst, float *kernel, int width, int height) {
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__m256 kernels[HALF_KERNEL];
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for (int i = 0, k = 0; i < HALF_KERNEL; i++, k += 2)
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kernels[i] = _mm256_setr_m128(_mm_set1_ps(kernel[k]), _mm_set1_ps(kernel[k+1]));
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for (int row = 0; row < height; row++) {
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for (int column = 0; column < width; column++, src++) {
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__m128i rgbaIn[REGISTERS_CNT];
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// handle borders
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int leftBorder = column < HALF_KERNEL;
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int rightBorder = column > width - HALF_KERNEL;
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uint32_t _rgbaIn[KERNEL_SIZE] ALIGN16;
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int i = 0;
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if (leftBorder) {
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// for kernel size 7x7 and column == 0, we have:
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// x x x P0 P1 P2 P3
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// first loop mirrors P{0..3} to fill x's,
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// second one loads P{0..3}
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for (; i < HALF_KERNEL - column; i++)
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_rgbaIn[i] = *(src + (HALF_KERNEL - i));
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for (; i < KERNEL_SIZE; i++)
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_rgbaIn[i] = *(src - (HALF_KERNEL - i));
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for (int k = 0; k < REGISTERS_CNT; k++)
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rgbaIn[k] = _mm_load_si128((__m128i*)(_rgbaIn + 4*k));
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} else if (rightBorder) {
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for (; i < width - column; i++)
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_rgbaIn[i] = *(src + i);
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for (int k = 0; i < KERNEL_SIZE; i++, k++)
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_rgbaIn[i] = *(src - k);
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for (int k = 0; k < REGISTERS_CNT; k++)
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rgbaIn[k] = _mm_load_si128((__m128i*)(_rgbaIn + 4*k));
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} else {
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for (int k = 0; k < REGISTERS_CNT; k++)
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rgbaIn[k] = _mm_loadu_si128((__m128i*)(src + 4*k - HALF_KERNEL));
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}
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// unpack each pixel, convert to float,
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// multiply by corresponding kernel value
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// and add to accumulator
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__m128i tmp;
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__m128i zero = _mm_setzero_si128();
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__m128 rgba_ps_128;
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__m256 rgba_ps;
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__m256 acc = _mm256_setzero_ps();
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int counter = 0;
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for (int i = 0; i < 3; i++)
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{
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tmp = _mm_unpacklo_epi8(rgbaIn[i], zero);
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rgba_ps = _mm256_cvtepi32_ps(_mm256_setr_m128i(_mm_unpacklo_epi16(tmp, zero),
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_mm_unpackhi_epi16(tmp, zero)));
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acc = _mm256_add_ps(acc, _mm256_mul_ps(rgba_ps, kernels[counter++]));
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tmp = _mm_unpackhi_epi8(rgbaIn[i], zero);
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rgba_ps = _mm256_cvtepi32_ps(_mm256_setr_m128i(_mm_unpacklo_epi16(tmp, zero),
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_mm_unpackhi_epi16(tmp, zero)));
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acc = _mm256_add_ps(acc, _mm256_mul_ps(rgba_ps, kernels[counter++]));
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}
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tmp = _mm_unpacklo_epi8(rgbaIn[3], zero);
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rgba_ps = _mm256_cvtepi32_ps(_mm256_setr_m128i(_mm_unpacklo_epi16(tmp, zero),
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_mm_unpackhi_epi16(tmp, zero)));
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acc = _mm256_add_ps(acc, _mm256_mul_ps(rgba_ps, kernels[counter]));
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tmp = _mm_unpackhi_epi8(rgbaIn[3], zero);
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rgba_ps_128 = _mm_cvtepi32_ps(_mm_unpacklo_epi16(tmp, zero));
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rgba_ps_128 = _mm_mul_ps(rgba_ps_128, _mm_set1_ps(kernel[KERNEL_SIZE-1]));
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rgba_ps_128 = _mm_add_ps(rgba_ps_128, _mm_add_ps(_mm256_extractf128_ps(acc, 0),
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_mm256_extractf128_ps(acc, 1)));
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__m128i rgbaOut = _mm_packs_epi32(_mm_cvtps_epi32(rgba_ps_128), zero);
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rgbaOut = _mm_packus_epi16(rgbaOut, zero);
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*(dst + height * column + row) = _mm_cvtsi128_si32(rgbaOut);
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}
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}
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}
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